This invention relates generally to the field of integrated circuit devices, and more particularly relates to an integrated circuit memory comprising an array of Zener diodes in series with programmable memory elements and to a design and method of manufacturing such a device. Another aspect of the invention relates to etching techniques for the formation of extremely thin structures for integrated circuit technologies.
A ZPROM (Zener Programmable Read Only Memory) is a relatively new type of one time programmable non-volatile memory. In U.S. Pat. No. 5,379,250, for example, the ZPROM array is composed of a plurality of interconnected ZPROM cells which are randomly accessible with a unique biasing scheme. The contents of that patent disclose how to use a ZPROM array manufactured using the processes disclosed herein and are incorporated by reference.
The ZPROM cell is composed of a Zener diode in series with a thin dielectric antifuse. The Zener diode allows electrical access to the antifuse and the antifuse stores one xe2x80x9cbitxe2x80x9d of memory. Initially, the antifuse is non-conductive and is regarded as being in the xe2x80x9czeroxe2x80x9d state. If a xe2x80x9conexe2x80x9d state is written to the memory cell, the antifuse becomes conductive.
A ZPROM has many unique characteristics. First, the ZPROM cell is a two terminal device which simplifies memory array construction and operation. Next, a Zener diode has more current capacity than other memory access devices of the same size. Most importantly, the unique biasing of the Zener array prohibits current leakage to the substrate by parasitic bipolar transistors. Parasitic bipolar transistors are a major disadvantage in a standard diode array, which is the most common two terminal access device array.
A ZPROM has the disadvantage of being a one time programmable memory. To compete with reprogrammable memories, it must contain clear advantages in other areas. Fortunately, the nature of the ZPROM allows many consumer advantages: low cost, massive memory, speed, and reliable programming. Its small cell size and minimization of parasitic transistors effects permit a higher cell density than most other memory arrays. A higher cell density means economical memory and massive memory storage per device. The Zener diode high current capacity means faster memory access, as well as ample current for reliable programming. The disclosed ZPROM array structure seeks to maximize these natural advantages.
In accordance with the present invention, a cost-competitive, dense, high current ZPROM array design and method of manufacture are disclosed which allows the ZPROM array to be easily embedded in CMOS applications. Efficient integration of ZPROM manufacture with CMOS manufacture is enabled by the use of the CMOS gate polysilicon and gate oxide in the manufacture of the array. Furthermore, because the processing steps of the array involve relatively few heat cycles, minimal disruption of previously engineered CMOS dopant profiles will result.
In accordance with one aspect of the present invention, a manufacturing method for the ZPROM array is disclosed which comprises fabricating an extremely thin diode, using previously deposited silicon dioxide (oxide) spacers as an etching mask. This allows for the manufacture of a vertical diode that is substantially as thick as the overlying spacer. Spacers have traditionally not been used in semiconductor processing as stand alone etching masks but only as offset masks for ion implantation in the formation of transistor junctions. This novel use of spacers as stand alone masks may also be extended to the etching of other underlying materials into much thinner strips than can currently be fabricated using conventional lithographic methods.